In part 1 (http://www.embeddedrelated.com/showarticle/85.php) of this series we focused on the hardware design, including some of the VHDL definitions of the I/O characteristics of the CPLD part. In part 2 (http://www.embeddedrelated.com/showarticle/87.php), we described the VHDL logic of the CPLD for this design. In part 3, we will show the entire VHDL design and the associated tests used to prove that we have, in fact, designed what we started out to design.
Posted by Gene Breniman on Jun 25 2011 under VHDL Programming | Hardware Development | Tutorials
Also Tutorials First Steps in OrCAD 16 [Capture]
Posted by Maykel Alonso on Jun 1 2012 under Hardware Development | Circuit Design
in
http://www.embeddedrelated.com/blogs-1/hf/all/Hardware_Development.php
|
